[kaffe] PATCH: consistently separate jitter and backend register ID
Casey Marshall
rsdio@metastatic.org
Mon Mar 8 10:42:02 2004
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Hi.
Working on the MIPS JIT3 I have made some small changes to the
architechture-independent register code for JIT3 that at least allow
the MIPS JIT to pass all the tests in test/internal. To summarize,
slotRegister now returns the `jitter ID' of the assigned register (the
index into the reginfo array), instead of the `backend ID'. All code
that depends on the former is unchanged, and all code that depends on
the latter now uses a new macro, `slotRegisterRegister', that is
equivalent to slotRegister, but returns the backend ID.
These changes are thankfully small, and do not break the x86 JIT at
least. There may be other code that needs `slotRegisterRegister'
instead of `slotRegister' now, and I of course welcome suggestions for
a better name (that is, unless you prefer that a wise-ass names
things).
This doesn't yet fix the MIPS JIT, but that is coming along. Next is
to fix floating-point comparisons.
2004-03-08 Casey Marshall <rsdio@metastatic.org>
* config/mips/jit3-mips.def:
(pushl_xRC): use slotRegisterRegister.
(fpushl_xRC): likewise.
* kaffe/kaffevm/register.c:
(slotRegister): return jitter ID, not backend ID.
* kaffe/kaffevm/register.h:
(slotRegisterRegister): new macro.
Replace instances of `slotRegister' with
`slotRegisterRegister' througout.
Cheers,
- --
Casey Marshall || rsdio@metastatic.org
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Content-Type: text/x-patch
Content-Disposition: attachment; filename=mips-registers.patch
Index: config/mips/jit3-mips.def
===================================================================
RCS file: /cvs/kaffe/kaffe/config/mips/jit3-mips.def,v
retrieving revision 1.11
diff -u -w -r1.11 jit3-mips.def
--- config/mips/jit3-mips.def 11 Mar 2003 08:00:17 -0000 1.11
+++ config/mips/jit3-mips.def 8 Mar 2004 18:15:55 -0000
@@ -1871,7 +1871,7 @@
o = REG_i4 + arg_idx;
r = rreg_ideal_int(1, o);
/* No macro for the following */
- w = slotRegister(seq_slot(s, 1)+1, Rint, rread, o+1);
+ w = slotRegisterRegister(seq_slot(s, 1)+1, Rint, rread, o+1);
debug(("REG s1:[%d]->%d s2:[%d]->%d\n",
slotOffsetNoSpill(seq_slot(s,1),Rint),r,
@@ -1906,7 +1906,7 @@
debug((" sw %s,%d[sp]\n", regname(r), w));
/* No macro for the following */
- r2 = slotRegister(seq_slot(s, 1)+1, Rint, rread, NOREG);
+ r2 = slotRegisterRegister(seq_slot(s, 1)+1, Rint, rread, NOREG);
debug(("STK s1:%d->[%d] s2:%d->[%d]\n",
r,w,r2,w+4));
@@ -1991,7 +1991,7 @@
/* dbmsg = 1; */
r = rreg_ideal_int(1, REG_i4+arg_idx+1);
/* No macro for the following */
- w = slotRegister(seq_slot(s, 1)+1, Rint, rread, REG_i4+arg_idx);
+ w = slotRegisterRegister(seq_slot(s, 1)+1, Rint, rread, REG_i4+arg_idx);
assert(r == REG_i4+arg_idx+1);
assert(w == r - 1);
register_reserve(r);
Index: kaffe/kaffevm/jit3/registers.c
===================================================================
RCS file: /cvs/kaffe/kaffe/kaffe/kaffevm/jit3/registers.c,v
retrieving revision 1.12
diff -u -w -r1.12 registers.c
--- kaffe/kaffevm/jit3/registers.c 12 May 2003 21:13:30 -0000 1.12
+++ kaffe/kaffevm/jit3/registers.c 8 Mar 2004 18:15:55 -0000
@@ -306,7 +306,7 @@
* @param use whether the slot is loaded for reading, writing or both.
* @param idealreg if the slot is to be moved into a particular register,
* this is the jitter id of it (NOREG if any register is ok).
- * @return backend id of assigned register
+ * @return jitter id of assigned register
*
* Perform the necessary spills and reloads to make this happen.
*/
@@ -458,7 +458,7 @@
SCHK( sanityCheck(); )
/* Return register */
- return (regi->regno);
+ return reg;
}
/**
Index: kaffe/kaffevm/jit3/registers.h
===================================================================
RCS file: /cvs/kaffe/kaffe/kaffe/kaffevm/jit3/registers.h,v
retrieving revision 1.8
diff -u -w -r1.8 registers.h
--- kaffe/kaffevm/jit3/registers.h 1 Jul 2003 15:56:57 -0000 1.8
+++ kaffe/kaffevm/jit3/registers.h 8 Mar 2004 18:15:55 -0000
@@ -87,8 +87,14 @@
#define rread 1
#define rwrite 2
+/*
+ * Exactly equivalent to slotRegister, but returns the backend ID of the
+ * assigned register instead of the jitter ID.
+ */
+#define slotRegisterRegister(_s,_t,_u,_r) (reginfo[slotRegister(_s,_t,_u,_r)].regno)
+
/* JIT2 compatibility */
-#define _slowSlotRegister(A,B,C) slotRegister(A,B,C,NOREG)
+#define _slowSlotRegister(A,B,C) slotRegisterRegister(A,B,C,NOREG)
#define _slotInRegister(S,T) _inRegister(S,T)
#define slotInRegister(I,T) inRegister(I,T)
#define slowSlotOffset(S,T,U) slotOffset(S,T,U)
@@ -98,20 +104,20 @@
* Macros to deal with slots of type jint.
*
*/
-#define rreg_int(i) slotRegister(seq_slot(s, i), Rint, rread, NOREG)
-#define wreg_int(i) slotRegister(seq_slot(s, i), Rint, rwrite, NOREG)
-#define rwreg_int(i) slotRegister(seq_slot(s, i), Rint, rread|rwrite, NOREG)
+#define rreg_int(i) slotRegisterRegister(seq_slot(s, i), Rint, rread, NOREG)
+#define wreg_int(i) slotRegisterRegister(seq_slot(s, i), Rint, rwrite, NOREG)
+#define rwreg_int(i) slotRegisterRegister(seq_slot(s, i), Rint, rread|rwrite, NOREG)
#define rslot_int(i) slotOffset(seq_slot(s, i), Rint, rread)
#define wslot_int(i) slotOffset(seq_slot(s, i), Rint, rwrite)
-#define rreg_ideal_int(i,r) slotRegister(seq_slot(s, i), Rint, rread, r)
+#define rreg_ideal_int(i,r) slotRegisterRegister(seq_slot(s, i), Rint, rread, r)
/**
* Macros to deal with slots of type ref.
*
*/
-#define rreg_ref(i) slotRegister(seq_slot(s, i), Rref, rread, NOREG)
-#define wreg_ref(i) slotRegister(seq_slot(s, i), Rref, rwrite, NOREG)
-#define rwreg_ref(i) slotRegister(seq_slot(s, i), Rref, rread|rwrite, NOREG)
+#define rreg_ref(i) slotRegisterRegister(seq_slot(s, i), Rref, rread, NOREG)
+#define wreg_ref(i) slotRegisterRegister(seq_slot(s, i), Rref, rwrite, NOREG)
+#define rwreg_ref(i) slotRegisterRegister(seq_slot(s, i), Rref, rread|rwrite, NOREG)
#define rslot_ref(i) slotOffset(seq_slot(s, i), Rref, rread)
#define wslot_ref(i) slotOffset(seq_slot(s, i), Rref, rwrite)
@@ -119,45 +125,45 @@
* Macros to deal with slots of type long.
*
*/
-#define rreg_long(i) slotRegister(seq_slot(s, i), Rlong, rread, NOREG)
-#define wreg_long(i) slotRegister(seq_slot(s, i), Rlong, rwrite, NOREG)
-#define rwreg_long(i) slotRegister(seq_slot(s, i), Rlong, rread|rwrite, NOREG)
+#define rreg_long(i) slotRegisterRegister(seq_slot(s, i), Rlong, rread, NOREG)
+#define wreg_long(i) slotRegisterRegister(seq_slot(s, i), Rlong, rwrite, NOREG)
+#define rwreg_long(i) slotRegisterRegister(seq_slot(s, i), Rlong, rread|rwrite, NOREG)
#define rslot_long(i) slotOffset(seq_slot(s, i), Rlong, rread)
#define wslot_long(i) slotOffset(seq_slot(s, i), Rlong, rwrite)
-#define rreg_ideal_long(i,r) slotRegister(seq_slot(s, i), Rlong, rread, r)
+#define rreg_ideal_long(i,r) slotRegisterRegister(seq_slot(s, i), Rlong, rread, r)
/**
* Macros to deal with slots of type float.
*
*/
-#define rreg_float(i) slotRegister(seq_slot(s, i), Rfloat, rread, NOREG)
-#define wreg_float(i) slotRegister(seq_slot(s, i), Rfloat, rwrite, NOREG)
-#define rwreg_float(i) slotRegister(seq_slot(s, i), Rfloat, rread|rwrite, NOREG)
+#define rreg_float(i) slotRegisterRegister(seq_slot(s, i), Rfloat, rread, NOREG)
+#define wreg_float(i) slotRegisterRegister(seq_slot(s, i), Rfloat, rwrite, NOREG)
+#define rwreg_float(i) slotRegisterRegister(seq_slot(s, i), Rfloat, rread|rwrite, NOREG)
#define rslot_float(i) slotOffset(seq_slot(s, i), Rfloat, rread)
#define wslot_float(i) slotOffset(seq_slot(s, i), Rfloat, rwrite)
-#define rreg_ideal_float(i,r) slotRegister(seq_slot(s, i), Rfloat, rread, r)
+#define rreg_ideal_float(i,r) slotRegisterRegister(seq_slot(s, i), Rfloat, rread, r)
/**
* Macros to deal with slots of type double.
*
*/
-#define rreg_double(i) slotRegister(seq_slot(s, i), Rdouble, rread, NOREG)
-#define wreg_double(i) slotRegister(seq_slot(s, i), Rdouble, rwrite, NOREG)
-#define rwreg_double(i) slotRegister(seq_slot(s, i), Rdouble, rread|rwrite, NOREG)
+#define rreg_double(i) slotRegisterRegister(seq_slot(s, i), Rdouble, rread, NOREG)
+#define wreg_double(i) slotRegisterRegister(seq_slot(s, i), Rdouble, rwrite, NOREG)
+#define rwreg_double(i) slotRegisterRegister(seq_slot(s, i), Rdouble, rread|rwrite, NOREG)
#define rslot_double(i) slotOffset(seq_slot(s, i), Rdouble, rread)
#define wslot_double(i) slotOffset(seq_slot(s, i), Rdouble, rwrite)
-#define rreg_ideal_double(i,r) slotRegister(seq_slot(s, i), Rdouble, rread, r)
+#define rreg_ideal_double(i,r) slotRegisterRegister(seq_slot(s, i), Rdouble, rread, r)
/**
* Macros to deal with slots of type subint.
*
*/
-#define rreg_subint(i) slotRegister(seq_slot(s, i), Rsubint, rread, NOREG)
-#define wreg_subint(i) slotRegister(seq_slot(s, i), Rsubint, rwrite, NOREG)
-#define rwreg_subint(i) slotRegister(seq_slot(s, i), Rsubint, rread|rwrite, NOREG)
+#define rreg_subint(i) slotRegisterRegister(seq_slot(s, i), Rsubint, rread, NOREG)
+#define wreg_subint(i) slotRegisterRegister(seq_slot(s, i), Rsubint, rwrite, NOREG)
+#define rwreg_subint(i) slotRegisterRegister(seq_slot(s, i), Rsubint, rread|rwrite, NOREG)
#define rslot_subint(i) slotOffset(seq_slot(s, i), Rsubint, rread)
#define wslot_subint(i) slotOffset(seq_slot(s, i), Rsubint, rwrite)
-#define rreg_ideal_subint(i,r) slotRegister(seq_slot(s, i), Rsubint, rread, r)
+#define rreg_ideal_subint(i,r) slotRegisterRegister(seq_slot(s, i), Rsubint, rread, r)
#define sreg(I) reginfo[(seq_slot(s,I)->regno)].regno
#define sreg_int(i) sreg(i)
@@ -173,11 +179,11 @@
#define lreg_float(i) wreg_float(i)
#define lreg_double(i) wreg_double(i)
#endif
-#define lreg_int(i) slotRegister(seq_slot(s, i), Rint, rreload, NOREG)
-#define lreg_ref(i) slotRegister(seq_slot(s, i), Rref, rreload, NOREG)
-#define lreg_long(i) slotRegister(seq_slot(s, i), Rlong, rreload, NOREG)
-#define lreg_float(i) slotRegister(seq_slot(s, i), Rfloat, rreload, NOREG)
-#define lreg_double(i) slotRegister(seq_slot(s, i), Rdouble, rreload, NOREG)
+#define lreg_int(i) slotRegisterRegister(seq_slot(s, i), Rint, rreload, NOREG)
+#define lreg_ref(i) slotRegisterRegister(seq_slot(s, i), Rref, rreload, NOREG)
+#define lreg_long(i) slotRegisterRegister(seq_slot(s, i), Rlong, rreload, NOREG)
+#define lreg_float(i) slotRegisterRegister(seq_slot(s, i), Rfloat, rreload, NOREG)
+#define lreg_double(i) slotRegisterRegister(seq_slot(s, i), Rdouble, rreload, NOREG)
#define const_int(I) s->u[I].value.i
#define const_long(I) s->u[I].value.l
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