Kaffe's JIT mechanism description

[Raffaele Sena]

On Tue, 10 Nov 1998, Godmar Back wrote:

> I know of no such document, although I agree with you that it is badly 
> needed, especially to aid JIT porters to new platforms.
> 
> 	- Godmar
> 

I asked the same question to Peter Mehlitz at the Atlanta Linux Showcase.
He showed me a slide that explains the structure of the JIT, with some
code from (if I remember well) kaffe/kaffevm/jit.c.

If that slide could be made available it could be a start (I think
Peter said it should be online, but I cannot find it).

Also, I'm currently trying to write the JIT for ARM Linux. I started
from the m68k jit (I would have preferred to start from a RISC port,
but SPARC assembly look awkword to me, I think the ALPHA port is not
complete - or it wasn't when I started - and the 68k is pretty
straightforward).

Basically I took all the jit related files from the m68k directory and
copied in the arm directory.

I changed some obvious things (registers names and so), I haked
jit-icode.h for the things I could understand (which instructions
you processor support), and I'm slowly rewriting the code in
jit-<processor>.def.

For what I could understand, you declare the instructions you support
in jit-icode.h:

	#define HAVE_load_int loadi_RxR

then you declare the instruction in jit-<processor>.def:

	define_insn(load_int, loadi_RxR)
	{
        	int r = rreg_ref(2);
        	int w = wreg_int(0);

	        op_movel_Id(r, w);
	}

And then you generate the code for that instruction:

	static inline void
	op_movel_Id(int src, int dst)
	{
        	debug(("movel (%s), %s\n", regname(src), regname(dst)));
	        assert_dreg(src);
        	assert_dreg(dst);
	        WOUT = (0x2000 | ((dst & 7) << 9) | (MODE_d << 6)
        	        | (MODE_ind << 3) | (src & 7));
	}

(it looks like I didn't implement this one yet. I still have the 68k
code ):

To generate the instructions, you do:

	WOUT = opcode

or
	LOUT = opcode

or (I suppose)

	BOUT = opcode

depending on the instruction/parameter size you are generetating
[ B/L/W are byte (8 bits), word (16 bits), long (32 bits) values ]

I have a few questions that maybe somebody can answer (then we can
collect these in a FAQ or a 'JIT porting notes for dummies' :)

- Is there a complete list of all the instructions supported by the
  JIT (all the values for HAVE_<instrution>) ?

- The instructions are defined with 3-registers parameter (op1, op2,
  destination). How do I specificy my processor supports the 3-registers
  architecture ? The m68k code simply check the first operand is the
  same as the destination. For my arm port I simply use all 3 parameters.
  Is that enough ?

- jit-icode.h defines some range checking macros/
  I have a few of them: HAVE_add_int_const_rangecheck(),
  HAVE_sub_const_rangecheck(), etc.

  Are there more of them I could/should define ?

  Also, the arm processor embed small constant in the opcode (0-255
  and some more values if I can generate them with some shift/rotate
  operations).

  If I implement the right rangecheck macros, can I assume the the
  instruction with immediate values will always be generated with
  the constant value in the range I specified ? (that means bigger
  values will generate Java code to put the value in a register)

This I think is all for now. Again, if somebody can answer to these
(and more to come) questions, I'm willing to collect the answers and put
them in a single "document".

Thanks,

	Raffaele

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